The Study of High-Speed Low-Power Prescaler in Programmable Frequency Divider
碩士 === 大同大學 === 電機工程學系(所) === 103 === The technology to reduce the power consumption of the divider is often by reducing the number of transistors used in circuits. Based on this technology, a switchable ETSPC-DFF circuit is proposed to effectively reduce power consumption. When the dual mode (÷N/...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2015
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| Online Access: | http://ndltd.ncl.edu.tw/handle/15378329041562711885 |