A Routability-Driven Placement Prototyping Considering Macro Regularity
碩士 === 國立成功大學 === 電機工程學系 === 104 === As advance of process technologies and widely reuse of intellectual property (IP), a system-on-chip (SoC) design usually contains a large amount of standard cells and several hundred of macros. Due to large difference in size between a standard cell and a macro a...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2016
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| Online Access: | http://ndltd.ncl.edu.tw/handle/762d48 |