Design of a Low-voltage 100Ks/s Successive Approximation Analog-to-Digital converter
碩士 === 國立暨南國際大學 === 電機工程學系 === 104 === A low-voltage 100Ks/s successive approximation ADC for the sensor in protable and wearable products is proposed in this thesis. In order to achieve low power consumption, the chip operating voltage is 0.6 V, and the input is single-ended rail-to-rail voltage si...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2016
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| Online Access: | http://ndltd.ncl.edu.tw/handle/46307515872360358269 |