Development and Electrical Investigation of Through Glass Via and Through Si Via in 3D Integration
碩士 === 國立交通大學 === 電子工程學系 電子研究所 === 104 === With the advancement to keep up with Moore's Law, ways to shorten the distance between the electrical signals and reduce the R-C delay have become important. With 3D vertical stacking using through glass via (TGV) and through silicon via (TSV) as inter...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2016
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| Online Access: | http://ndltd.ncl.edu.tw/handle/6nygu9 |