ThermPL: Thermal-aware Placement Based on Thermal Contribution and Locality
碩士 === 國立交通大學 === 電信工程研究所 === 104 === This work builds a thermal-aware placer, ThermPL, to abate both on-chip peak temperature and thermal gradient by developing thermal force and thermal padding techniques cooperated with rough legalization in the force-directed global placement. To make use of the...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | en_US |
Published: |
2016
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Online Access: | http://ndltd.ncl.edu.tw/handle/81589249115641811976 |