ECID: EtherCAT Communication System Identification using Register-based Estimation

• Main Authors: Cheng, Yu-Che, 鄭宇哲
• Other Authors: Huang, Yu-Lun
• Format: Others
• Language: en_US
• Published: 2016
• Online Access: http://ndltd.ncl.edu.tw/handle/rkmta3

碩士 === 國立交通大學 === 電機工程學系 === 104 === The communication between a control application and servo motors requires high bandwidth and precise time determinism. To meet the requirements, EtherCAT is adopted as the fieldbus communication protocol. However, there are still some imperfection existing in an EtherCAT communication system, including rated clock cycle and clock cycle jitter. These influences would cause inaccuracy when an engineer determines characteristics of servo motors such as the moment of inertia or the coefficient of friction. Thus, the real-time performance of an EtherCAT communication system should be identified. In this paper, we present an EtherCAT communication system identification, named ECID, to estimate system time difference, packet traveling time and clock cycle jitter by using DC registers. The system parameters including boundary of clock and load response are then to identify an EtherCAT communication system. A mathematical model is presented to describe the range of clock cycle and the probability distribution of clock cycle jitter. We verify the relibility of ECID by conducting several experiments. From the experiments, we conclude that 1) ECID can distinguish heterogeneous devices and homogeneous devices by observing the performance of system time difference. 2) ECID can better estimate the packet traveling time. 3) The clock cycle jitter estimated by ECID is from all interference in the whole system including the master, network and slave devices.