Thermal-aware Dynamic Page Allocation Policy Considering Future Access Patterns for Hybrid Memory Cube (HMC)
碩士 === 國立清華大學 === 資訊工程學系 === 104 === Three-dimensional (3-D) memory stacking like Hybrid Memory Cube (HMC) can resolve memory bandwidth challenges for multi-core system where stacked multiple DRAM dies are connected by Through Silicon Vias (TSVs). However, high power density due to the high in- tegr...
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ndltd-TW-104NTHU53920082017-08-27T04:29:50Z http://ndltd.ncl.edu.tw/handle/42112995105675746617 Thermal-aware Dynamic Page Allocation Policy Considering Future Access Patterns for Hybrid Memory Cube (HMC) 三維記憶體之動態考量散熱與存取模式的配置方法 Liang, Kai Tse 梁凱澤 碩士 國立清華大學 資訊工程學系 104 Three-dimensional (3-D) memory stacking like Hybrid Memory Cube (HMC) can resolve memory bandwidth challenges for multi-core system where stacked multiple DRAM dies are connected by Through Silicon Vias (TSVs). However, high power density due to the high in- tegration incurs temperature related problems in reliability, performance, and system cooling cost. In addition to thermal issues, in multi-core system, memory interference between pro- cesses may degrade system performance. In order to achieve better performance, we propose a dynamic page allocation policy considering access frequency of pages, physical locations of DRAM dies, thermal impacts, bandwidth variation of each process, and memory interference among processes. We also propose an analytical model to estimate the system performance considering the above factors. Experimental results show that our proposed memory mapping policy can outperform MCP [1] 12.7% on average. The average error rate of our analytical model is only 0.86%. Hwang, Ting Ting 黃婷婷 2015 學位論文 ; thesis 38 en_US |
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碩士 === 國立清華大學 === 資訊工程學系 === 104 === Three-dimensional (3-D) memory stacking like Hybrid Memory Cube (HMC) can resolve
memory bandwidth challenges for multi-core system where stacked multiple DRAM dies are
connected by Through Silicon Vias (TSVs). However, high power density due to the high in-
tegration incurs temperature related problems in reliability, performance, and system cooling
cost. In addition to thermal issues, in multi-core system, memory interference between pro-
cesses may degrade system performance. In order to achieve better performance, we propose
a dynamic page allocation policy considering access frequency of pages, physical locations of
DRAM dies, thermal impacts, bandwidth variation of each process, and memory interference
among processes. We also propose an analytical model to estimate the system performance
considering the above factors. Experimental results show that our proposed memory mapping
policy can outperform MCP [1] 12.7% on average. The average error rate of our analytical
model is only 0.86%.
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author2 |
Hwang, Ting Ting |
author_facet |
Hwang, Ting Ting Liang, Kai Tse 梁凱澤 |
author |
Liang, Kai Tse 梁凱澤 |
spellingShingle |
Liang, Kai Tse 梁凱澤 Thermal-aware Dynamic Page Allocation Policy Considering Future Access Patterns for Hybrid Memory Cube (HMC) |
author_sort |
Liang, Kai Tse |
title |
Thermal-aware Dynamic Page Allocation Policy Considering Future Access Patterns for Hybrid Memory Cube (HMC) |
title_short |
Thermal-aware Dynamic Page Allocation Policy Considering Future Access Patterns for Hybrid Memory Cube (HMC) |
title_full |
Thermal-aware Dynamic Page Allocation Policy Considering Future Access Patterns for Hybrid Memory Cube (HMC) |
title_fullStr |
Thermal-aware Dynamic Page Allocation Policy Considering Future Access Patterns for Hybrid Memory Cube (HMC) |
title_full_unstemmed |
Thermal-aware Dynamic Page Allocation Policy Considering Future Access Patterns for Hybrid Memory Cube (HMC) |
title_sort |
thermal-aware dynamic page allocation policy considering future access patterns for hybrid memory cube (hmc) |
publishDate |
2015 |
url |
http://ndltd.ncl.edu.tw/handle/42112995105675746617 |
work_keys_str_mv |
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