Design and Analysis of Memory Interface Architecture for Many-Core Platforms

碩士 === 國立清華大學 === 資訊工程學系 === 104 === In past decades, system on a chip gives explorers add more functions on a single chip. But Moore's Law indicates transistor counts doubled approximately every two years. The design complexity also encounter sharp challenge. Undoubtedly, raising the abstracti...

Full description

Bibliographic Details
Main Authors: Yeh, Kuo Kai, 葉國楷
Other Authors: Huang, Chih Tsun
Format: Others
Language:en_US
Published: 2015
Online Access:http://ndltd.ncl.edu.tw/handle/09523182051823206473