Clock Skew Optimization for Voltage Variation
碩士 === 國立清華大學 === 資訊工程學系 === 104 === Clock skew minimization has been extensively studied. However the problem is still difficult to resolve because clock skew needs to satisfy many different environmental corners. It has been known that optimizing skew at one corner may cause timing violation at an...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2016
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| Online Access: | http://ndltd.ncl.edu.tw/handle/2j26u4 |