| Summary: | 碩士 === 國立清華大學 === 電子工程研究所 === 104 === In the thesis, we investigated in the design and fabrication issues of 1200V, 2 Amp junction barrier Schottky diodes. 2-D simulation shows that varying p+ grid spacing between 2-4 μm results in optimal trade-off
between the forward and reverse characteristics.
We have also studied different treatments on Schottky contacts on 4H-SiC for the processing of JBS diodes. For high voltage applications, the control of Schottky barrier is very critical. In our experiments, metal- semiconductor interface properties can be adjusted by RTA process. Take Ti /4H-SiC interface for example, the Schottky barrier height would be increased from 0.65 eV to 1.23 eV with an ideality factor close to 1 by appropriate thermal treatment. As a result, we fabricated 4H-SiC Ti-JBS structures annealed at 450~550℃ for 5 minutes in vacuum. The best device shows a high reverse blocking voltage about 1 kV with a leakage current of 10 nA. Forward current density is about 300~400 A/cm2 at 2 V. Finally, we fabricated 700 um x 700um size JBS devices to increase the conduction current. The best packaged device can deliver 1.5 Amp at 2 V, while the leakage current of device is less than100 μA at -600 V.
|
|---|
