Analyses of Yttrium Oxide and Yttrium–doped Germanium Oxide on Germanium by Oxide MBE
碩士 === 國立臺灣大學 === 電子工程學研究所 === 104 === In the dissertation, the oxide MBE system was harnessed to synthesize both yttrium oxide(Y_2 O_3)and yttrium – doped germanium oxide(Y - GeO_2)on germanium substrate. Then, the metal – oxide – semiconductor capacitor, MOSCap, devices were fabricated after meta...
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ndltd-TW-104NTU054281012017-06-03T04:42:00Z http://ndltd.ncl.edu.tw/handle/57688629386416217567 Analyses of Yttrium Oxide and Yttrium–doped Germanium Oxide on Germanium by Oxide MBE 利用氧化層磊晶系統製作氧化釔及釔參雜氧化鍺金氧半電容元件與分析 Wei-Ting Shen 沈威廷 碩士 國立臺灣大學 電子工程學研究所 104 In the dissertation, the oxide MBE system was harnessed to synthesize both yttrium oxide(Y_2 O_3)and yttrium – doped germanium oxide(Y - GeO_2)on germanium substrate. Then, the metal – oxide – semiconductor capacitor, MOSCap, devices were fabricated after metal was deposited on the semiconductor – oxide samples by utilizing the e – gun evaporator. The primary purpose was to determine whether the interfacial layer was necessary between Ge substrates and high – k materials as a buffer layer in Ge – based MOSCap devices. Additionally, due to the instable properties of GeO_2, yttrium atoms were doped into GeO_2 to strengthen the chemical bonding and ameliorate the overall performances of MOSCap devices, including higher dielectric constant(k)and lower leakage current density, etc. Using post – metallization annealing, PMA, was beneficial to improve the electrical characteristics in numerous aspects. Both border traps and interface – trap density(D_it)were observed to be lower after going through the process of PMA. The former could be clarified by the reduction of hysteresis and frequency dispersion in C – V measurement, the latter was confirmed by the calculation of high – low – frequency capacitance method. Furthermore, leakage current density of the devices was found to be lower in the PMA condition of 250 ℃. The explanation of the phenomenon was the repair of dangling bonds in oxide by hydrogen atoms in forming gas. In room temperature, the minimum value of interface – trap density of devices was 9.099 × 〖10〗^11 eV^(-1) cm^(-2) by utilizing the high – low – frequency capacitance method. At last, by comparing the interface – trap density of devices fabricated by a series of emission current, we concluded that the interfacial layer was needed between Ge substrates and high – k materials as a buffer layer due to lower D_it, indicating better interface quality than direct contact of Ge substrates and high – k materials. Hao-Hsiung Lin 林浩雄 2016 學位論文 ; thesis 56 zh-TW |
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碩士 === 國立臺灣大學 === 電子工程學研究所 === 104 === In the dissertation, the oxide MBE system was harnessed to synthesize both yttrium oxide(Y_2 O_3)and yttrium – doped germanium oxide(Y - GeO_2)on germanium substrate. Then, the metal – oxide – semiconductor capacitor, MOSCap, devices were fabricated after metal was deposited on the semiconductor – oxide samples by utilizing the e – gun evaporator. The primary purpose was to determine whether the interfacial layer was necessary between Ge substrates and high – k materials as a buffer layer in Ge – based MOSCap devices. Additionally, due to the instable properties of GeO_2, yttrium atoms were doped into GeO_2 to strengthen the chemical bonding and ameliorate the overall performances of MOSCap devices, including higher dielectric constant(k)and lower leakage current density, etc.
Using post – metallization annealing, PMA, was beneficial to improve the electrical characteristics in numerous aspects. Both border traps and interface – trap density(D_it)were observed to be lower after going through the process of PMA. The former could be clarified by the reduction of hysteresis and frequency dispersion in C – V measurement, the latter was confirmed by the calculation of high – low – frequency capacitance method. Furthermore, leakage current density of the devices was found to be lower in the PMA condition of 250 ℃. The explanation of the phenomenon was the repair of dangling bonds in oxide by hydrogen atoms in forming gas.
In room temperature, the minimum value of interface – trap density of devices was 9.099 × 〖10〗^11 eV^(-1) cm^(-2) by utilizing the high – low – frequency capacitance method. At last, by comparing the interface – trap density of devices fabricated by a series of emission current, we concluded that the interfacial layer was needed between Ge substrates and high – k materials as a buffer layer due to lower D_it, indicating better interface quality than direct contact of Ge substrates and high – k materials.
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author2 |
Hao-Hsiung Lin |
author_facet |
Hao-Hsiung Lin Wei-Ting Shen 沈威廷 |
author |
Wei-Ting Shen 沈威廷 |
spellingShingle |
Wei-Ting Shen 沈威廷 Analyses of Yttrium Oxide and Yttrium–doped Germanium Oxide on Germanium by Oxide MBE |
author_sort |
Wei-Ting Shen |
title |
Analyses of Yttrium Oxide and Yttrium–doped Germanium Oxide on Germanium by Oxide MBE |
title_short |
Analyses of Yttrium Oxide and Yttrium–doped Germanium Oxide on Germanium by Oxide MBE |
title_full |
Analyses of Yttrium Oxide and Yttrium–doped Germanium Oxide on Germanium by Oxide MBE |
title_fullStr |
Analyses of Yttrium Oxide and Yttrium–doped Germanium Oxide on Germanium by Oxide MBE |
title_full_unstemmed |
Analyses of Yttrium Oxide and Yttrium–doped Germanium Oxide on Germanium by Oxide MBE |
title_sort |
analyses of yttrium oxide and yttrium–doped germanium oxide on germanium by oxide mbe |
publishDate |
2016 |
url |
http://ndltd.ncl.edu.tw/handle/57688629386416217567 |
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