The VLSI Architecture of a High-Throughput Configurable Pre-processor for MIMO Detections

碩士 === 國立臺灣科技大學 === 電子工程系 === 104 === This thesis presents the VLSI architecture and circuit implementation of a high-throughput configurable pre-processor for 4×4 Multiple-Input Multiple-Output (MIMO) systems. The proposed configurable pre-processor can support three functions – QR decomposition (Q...

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Bibliographic Details
Main Authors: Tzu-Ting Tseng, 曾梓庭
Other Authors: Chung-An Shen
Format: Others
Language:en_US
Published: 2016
Online Access:http://ndltd.ncl.edu.tw/handle/94532926801103773887