An All-Digital Fast-Locking Deskew Buffer using Standard Cell Library
碩士 === 國立雲林科技大學 === 電機工程系 === 104 === In this thesis, an all-digital fast-locking deskew buffer with duty-cycle correction is proposed and realized by the cell-based design flow. Most previous works were designed in a full-custom design manner. However, this work is completely implemented with the...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2016
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/22637488432994097253 |