Study on Refresh Techniques for DRAM Refresh Power Reduction
碩士 === 中原大學 === 資訊工程研究所 === 105 === DRAM circuit requires periodic refresh operations to prevent data loss. However, DRAM refresh incurs extra power consumption and degrades system performance due to delaying of memory requests service. As DRAM density increases, DRAM refresh overhead is even worsen...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2016
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| Online Access: | http://ndltd.ncl.edu.tw/handle/4g7682 |