Investigation of Co-Alloy Encapsulated Cu Wires Fabricated on Porous Dielectric Layers by Using All-Electroless Plating Processes
碩士 === 逢甲大學 === 材料科學與工程學系 === 105 === Nowadays, the scales of integrated circuit along with advances in semiconductor technology and continuing to miniaturization, so it’s imperative to enhance the internal density and chip performance of the components. Recently, the development of the semiconduct...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2017
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| Online Access: | http://ndltd.ncl.edu.tw/handle/60353811510876511892 |