Capacitive Coupling Wireless Testing Application on Probe Card

碩士 === 國立中興大學 === 資訊科學與工程學系 === 105 === Abstract According to Moore’s Law, the manufacture of semi-conduction is going to face the bottleneck. The Fabrications as TSMC, UMC and Memory Fabrications as Micron, NAYA, are pursuing for low cost and high output now. In wafer manufacture process, testing...

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Bibliographic Details
Main Authors: Fu-Chi Ou, 歐富吉
Other Authors: 黃德成
Format: Others
Language:en_US
Published: 2016
Online Access:http://ndltd.ncl.edu.tw/handle/29122285606355542016