Power and Area Efficient Hold Time Fixing by Free Metal Segment Allocation
碩士 === 國立交通大學 === 電子研究所 === 105 === Hold time fixing ensures correct data synchronization, which is essential and serves as the final step of timing closure for IC design. Conventionally, buffer insertion is adopted to fix hold time violations; however, in last step of hold time fixing, leave numero...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2017
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| Online Access: | http://ndltd.ncl.edu.tw/handle/924e8n |