Strained-Gate with Negative Capacitance Ferroelectric Dielectric Layer for Energy Efficient Memories and Sub-10nm Transistors
博士 === 國立交通大學 === 電子研究所 === 105
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2017
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| Online Access: | http://ndltd.ncl.edu.tw/handle/dhkz77 |