All-Digital Phase-Locked Loops with Multiple-Delay Switching TDC
碩士 === 國立交通大學 === 電機工程學系 === 105 === As the Internet of Things (IOT) and 5G applications become more and more popular, the importance of full-customer and the SOC design increases as well. Phase-Locked Loops (PLLs), as one of the key parts in SOC designs, are widely used in the Clock and Data Reco...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2016
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| Online Access: | http://ndltd.ncl.edu.tw/handle/54737721259529853018 |