Self-heating Effects on 3-D Transistors
碩士 === 國立臺灣大學 === 光電工程學研究所 === 105 === Back-end-of-line thermal capacitance and thermal resistance have been calculated by using two two-step pseudo isothermal plane model. Face-up and face-down are the key factors of device heat dissipation pathes. Intrinsic FinFETs thermal resistance are extracted...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | en_US |
Published: |
2017
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Online Access: | http://ndltd.ncl.edu.tw/handle/33409291292569798176 |