A STT-RAM / DRAM hybrid architecture for system memory management
碩士 === 國立臺灣科技大學 === 資訊工程系 === 105 === In recent years, the emerging of STT-RAM (Spin Transfer Torque Random Access Memory) has drawn a lot attentions from both academia and industry. Compared with DRAM, STT-RAM has simpler structure, lower access latency, and lower power consumption. However, STT-RA...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2016
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| Online Access: | http://ndltd.ncl.edu.tw/handle/53087307293175684803 |
| Summary: | 碩士 === 國立臺灣科技大學 === 資訊工程系 === 105 === In recent years, the emerging of STT-RAM (Spin Transfer Torque Random Access
Memory) has drawn a lot attentions from both academia and industry. Compared with DRAM, STT-RAM has simpler structure, lower access latency, and lower power consumption. However, STT-RAM cannot replace DRAM since STT-RAM is still in the earlier stage of development and its cost is much higher than DRAM. In this paper, we present a STT-RAM/DRAM hybrid memory management scheme that combines a small amount of STT-RAM with DRAM as the main memory for the host. The experiment results showed that 2GB DRAM with 128MB STT-RAM can reduce 58.07% power consumption of memory unit and improve 42.8% system performance.
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