A STT-RAM / DRAM hybrid architecture for system memory management

碩士 === 國立臺灣科技大學 === 資訊工程系 === 105 === In recent years, the emerging of STT-RAM (Spin Transfer Torque Random Access Memory) has drawn a lot attentions from both academia and industry. Compared with DRAM, STT-RAM has simpler structure, lower access latency, and lower power consumption. However, STT-RA...

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Main Authors: Yi-Lin - Liao, 廖一驎
Other Authors: Jen-Wei Hsieh
Format: Others
Language:zh-TW
Published: 2016
Online Access:http://ndltd.ncl.edu.tw/handle/53087307293175684803
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spelling ndltd-TW-105NTUS53920222017-03-31T04:39:19Z http://ndltd.ncl.edu.tw/handle/53087307293175684803 A STT-RAM / DRAM hybrid architecture for system memory management STT-RAM / DRAM 混合型記憶體管理機制 Yi-Lin - Liao 廖一驎 碩士 國立臺灣科技大學 資訊工程系 105 In recent years, the emerging of STT-RAM (Spin Transfer Torque Random Access Memory) has drawn a lot attentions from both academia and industry. Compared with DRAM, STT-RAM has simpler structure, lower access latency, and lower power consumption. However, STT-RAM cannot replace DRAM since STT-RAM is still in the earlier stage of development and its cost is much higher than DRAM. In this paper, we present a STT-RAM/DRAM hybrid memory management scheme that combines a small amount of STT-RAM with DRAM as the main memory for the host. The experiment results showed that 2GB DRAM with 128MB STT-RAM can reduce 58.07% power consumption of memory unit and improve 42.8% system performance. Jen-Wei Hsieh 謝仁偉 2016 學位論文 ; thesis 50 zh-TW
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language zh-TW
format Others
sources NDLTD
description 碩士 === 國立臺灣科技大學 === 資訊工程系 === 105 === In recent years, the emerging of STT-RAM (Spin Transfer Torque Random Access Memory) has drawn a lot attentions from both academia and industry. Compared with DRAM, STT-RAM has simpler structure, lower access latency, and lower power consumption. However, STT-RAM cannot replace DRAM since STT-RAM is still in the earlier stage of development and its cost is much higher than DRAM. In this paper, we present a STT-RAM/DRAM hybrid memory management scheme that combines a small amount of STT-RAM with DRAM as the main memory for the host. The experiment results showed that 2GB DRAM with 128MB STT-RAM can reduce 58.07% power consumption of memory unit and improve 42.8% system performance.
author2 Jen-Wei Hsieh
author_facet Jen-Wei Hsieh
Yi-Lin - Liao
廖一驎
author Yi-Lin - Liao
廖一驎
spellingShingle Yi-Lin - Liao
廖一驎
A STT-RAM / DRAM hybrid architecture for system memory management
author_sort Yi-Lin - Liao
title A STT-RAM / DRAM hybrid architecture for system memory management
title_short A STT-RAM / DRAM hybrid architecture for system memory management
title_full A STT-RAM / DRAM hybrid architecture for system memory management
title_fullStr A STT-RAM / DRAM hybrid architecture for system memory management
title_full_unstemmed A STT-RAM / DRAM hybrid architecture for system memory management
title_sort stt-ram / dram hybrid architecture for system memory management
publishDate 2016
url http://ndltd.ncl.edu.tw/handle/53087307293175684803
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