Partial Time Redundancy Techniques for Enhancing Yield and Reliability of Embedded Memories
碩士 === 國立臺灣科技大學 === 電機工程系 === 105 === To improve the fabrication yield and reliability of embedded memories, error correction code (ECC) and built-in self-repair (BISR) techniques are widely used to deal with soft errors and hard errors in recent years, respectively. There are also some previous tec...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2017
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| Online Access: | http://ndltd.ncl.edu.tw/handle/3x622c |