Investigation of Electrical Properties in Novel InGaP/GaAs/GaAsBi and InP/InGaAs Heterostructure Transistors

博士 === 國立高雄大學 === 電機工程學系碩博士班 === 105 ===    Heterostructure transistors based on III-V compound semiconductor material systems have been widely applied in digital and microwave circuit applications due to their excellent high-speed and microwave performances combined with high current driving capabi...

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Main Authors: WU, YI-CHEN, 吳宜蓁
Other Authors: CHIANG, TE-KUANG
Format: Others
Language:en_US
Published: 2017
Online Access:http://ndltd.ncl.edu.tw/handle/98626813940332651379
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description 博士 === 國立高雄大學 === 電機工程學系碩博士班 === 105 ===    Heterostructure transistors based on III-V compound semiconductor material systems have been widely applied in digital and microwave circuit applications due to their excellent high-speed and microwave performances combined with high current driving capability. In this dissertation, the InGaP/GaAs/GaAsBi- and InP/InGaAs-based heterostructure transistors are successfully fabricated and studied by wet selectively etching process and two-dimensional analysis. The improved device structures, including a novel heterostructure bipolar and field-effect transistors (BiFETs), are demonstrated. The employment of the GaAsSb/InGaAs Type-II heterostructure to replace the conventional InP/InGaAs Type-I heterostructure and the use of a GaAsBi material as base layer of heterojinction bipolar transistors (HBTs) are investigated in this dissertation. In addition, we demonstrate the InxGa1-xP (x : 0.52→1) metamorphic buffer layer to enable the InP-based transistors grown on low-cost GaAs substrates.    In the BiFET, the field-effect transistor (FET) with pseudomorphic channel layer was stacked on the top of the metamorphic HBT with pseudomorphic base-emitter spacer layers. In the FET, due to the considerable conduction band discontinuity (ΔEc) value at InP/InGaAs heterojunction and the employment of a thin as well as heavily doped InGaAs pseudomorphic channel between two undoped InP layers, it will form a large potential barrier preventing the eletron injection from channel into gate electrode. On the other hand, the HBT employs a delta-doped sheet introduced between two undoped InGaAs spacer layers to lower the energy band at emitter side, and then the confinement effect for hole is effectively increased. Therefore, the device linearity and the dc performance are improved. The studied device exhibits a large transconductance and drain current in the FET. High current gain and collector current could be obtained in the HBT as well. Furthermore, a very low collector-emitter offset voltage of 50mV is achieved.    For the InP/InGaAs Type-I DCFETs, the ΔEc value at InP/InGaAs heterojunction is lower than that of the GaAsSb/InGaAs heterojunction. At thermal equilibrium, the conduction band of the n+-InGaAs channel is lower than the Fermi level. It will form more carriers in the quantum-well and enables the two-dimensional electron gas (2DEG) to increase. The GaAsSb/InGaAs device will act as a depletion-mode transistor. In chapter 3, comprehensively theoretical analysis of InP/InGaAs Type-I and GaAsSb/InGaAs Type-II DCFETs are implemented and studied. As compared with the InP/InGaAs DCFET, the GaAsSb/InGaAs DCFET exhibirs a higher transconductance and a higher drain current. However, part of electrons in the InGaAs channel could transport into gate electrode through the potential spikes by tunneling effect under large gate-to-source bias. This will result in considerably large leakage current and a smaller turn-on voltage in the GaAsSb/InGaAs DCFET. For HBTs, the existence of ΔEc substantially deteriorates the device performance. Although the typical magnitude of ΔEc at InGaP/GaAs heterointerface is small, the undesired potential spike is still observed. In chapter 4, a GaAsBi material is employed to replace the GaAs to act as the base layer. Because of the band-gap discontinuity is almost equal to the valence band discontinuity (ΔEv) at GaAs/GaAsBi heterojunction, i.e., the ΔEc is almost zero (ΔEc ~ 0). Because the tunneling probability for holes is kept small, the emitter injenction efficiency is improved. Furthermore, in order to improve the dc performance, the employment of a superlattice-emitter layer to replace the original bulk InGaP emitter layer. In this device, the most charge in the emitter are easier and fast to travel across superlattice-emitter by tunneling behavior under forward bias. Therefore, the device has a low turn-on voltage and a relatively low offset voltage. Also the electron concentration in the superlattice-emitter device increases in the base under the bias. This will substantially cause the slight base bulk recombination current. Even so, the more electrons stored in the base layer could promote the collector current. The studied supperlattice-emitter device can be operated under an extremely wide collector current regime larger than 12 decades.
author2 CHIANG, TE-KUANG
author_facet CHIANG, TE-KUANG
WU, YI-CHEN
吳宜蓁
author WU, YI-CHEN
吳宜蓁
spellingShingle WU, YI-CHEN
吳宜蓁
Investigation of Electrical Properties in Novel InGaP/GaAs/GaAsBi and InP/InGaAs Heterostructure Transistors
author_sort WU, YI-CHEN
title Investigation of Electrical Properties in Novel InGaP/GaAs/GaAsBi and InP/InGaAs Heterostructure Transistors
title_short Investigation of Electrical Properties in Novel InGaP/GaAs/GaAsBi and InP/InGaAs Heterostructure Transistors
title_full Investigation of Electrical Properties in Novel InGaP/GaAs/GaAsBi and InP/InGaAs Heterostructure Transistors
title_fullStr Investigation of Electrical Properties in Novel InGaP/GaAs/GaAsBi and InP/InGaAs Heterostructure Transistors
title_full_unstemmed Investigation of Electrical Properties in Novel InGaP/GaAs/GaAsBi and InP/InGaAs Heterostructure Transistors
title_sort investigation of electrical properties in novel ingap/gaas/gaasbi and inp/ingaas heterostructure transistors
publishDate 2017
url http://ndltd.ncl.edu.tw/handle/98626813940332651379
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spelling ndltd-TW-105NUK004420162017-11-03T04:48:57Z http://ndltd.ncl.edu.tw/handle/98626813940332651379 Investigation of Electrical Properties in Novel InGaP/GaAs/GaAsBi and InP/InGaAs Heterostructure Transistors 新型磷化銦鎵/砷化鎵/鉍砷化鎵與磷化銦/砷化銦鎵異質結構電晶體之電性研究 WU, YI-CHEN 吳宜蓁 博士 國立高雄大學 電機工程學系碩博士班 105    Heterostructure transistors based on III-V compound semiconductor material systems have been widely applied in digital and microwave circuit applications due to their excellent high-speed and microwave performances combined with high current driving capability. In this dissertation, the InGaP/GaAs/GaAsBi- and InP/InGaAs-based heterostructure transistors are successfully fabricated and studied by wet selectively etching process and two-dimensional analysis. The improved device structures, including a novel heterostructure bipolar and field-effect transistors (BiFETs), are demonstrated. The employment of the GaAsSb/InGaAs Type-II heterostructure to replace the conventional InP/InGaAs Type-I heterostructure and the use of a GaAsBi material as base layer of heterojinction bipolar transistors (HBTs) are investigated in this dissertation. In addition, we demonstrate the InxGa1-xP (x : 0.52→1) metamorphic buffer layer to enable the InP-based transistors grown on low-cost GaAs substrates.    In the BiFET, the field-effect transistor (FET) with pseudomorphic channel layer was stacked on the top of the metamorphic HBT with pseudomorphic base-emitter spacer layers. In the FET, due to the considerable conduction band discontinuity (ΔEc) value at InP/InGaAs heterojunction and the employment of a thin as well as heavily doped InGaAs pseudomorphic channel between two undoped InP layers, it will form a large potential barrier preventing the eletron injection from channel into gate electrode. On the other hand, the HBT employs a delta-doped sheet introduced between two undoped InGaAs spacer layers to lower the energy band at emitter side, and then the confinement effect for hole is effectively increased. Therefore, the device linearity and the dc performance are improved. The studied device exhibits a large transconductance and drain current in the FET. High current gain and collector current could be obtained in the HBT as well. Furthermore, a very low collector-emitter offset voltage of 50mV is achieved.    For the InP/InGaAs Type-I DCFETs, the ΔEc value at InP/InGaAs heterojunction is lower than that of the GaAsSb/InGaAs heterojunction. At thermal equilibrium, the conduction band of the n+-InGaAs channel is lower than the Fermi level. It will form more carriers in the quantum-well and enables the two-dimensional electron gas (2DEG) to increase. The GaAsSb/InGaAs device will act as a depletion-mode transistor. In chapter 3, comprehensively theoretical analysis of InP/InGaAs Type-I and GaAsSb/InGaAs Type-II DCFETs are implemented and studied. As compared with the InP/InGaAs DCFET, the GaAsSb/InGaAs DCFET exhibirs a higher transconductance and a higher drain current. However, part of electrons in the InGaAs channel could transport into gate electrode through the potential spikes by tunneling effect under large gate-to-source bias. This will result in considerably large leakage current and a smaller turn-on voltage in the GaAsSb/InGaAs DCFET. For HBTs, the existence of ΔEc substantially deteriorates the device performance. Although the typical magnitude of ΔEc at InGaP/GaAs heterointerface is small, the undesired potential spike is still observed. In chapter 4, a GaAsBi material is employed to replace the GaAs to act as the base layer. Because of the band-gap discontinuity is almost equal to the valence band discontinuity (ΔEv) at GaAs/GaAsBi heterojunction, i.e., the ΔEc is almost zero (ΔEc ~ 0). Because the tunneling probability for holes is kept small, the emitter injenction efficiency is improved. Furthermore, in order to improve the dc performance, the employment of a superlattice-emitter layer to replace the original bulk InGaP emitter layer. In this device, the most charge in the emitter are easier and fast to travel across superlattice-emitter by tunneling behavior under forward bias. Therefore, the device has a low turn-on voltage and a relatively low offset voltage. Also the electron concentration in the superlattice-emitter device increases in the base under the bias. This will substantially cause the slight base bulk recombination current. Even so, the more electrons stored in the base layer could promote the collector current. The studied supperlattice-emitter device can be operated under an extremely wide collector current regime larger than 12 decades. CHIANG, TE-KUANG TSAI, JUNG-HUI 江德光 蔡榮輝 2017 學位論文 ; thesis 118 en_US