Chip Design of Low-voltage SAR ADC with Adjustable Building-in-self-testing
碩士 === 國立臺北科技大學 === 電子工程系研究所 === 105 === With the development of intelligent wearable devices, in this thesis, a low-voltage 10-bit successive approximation register analog-to-digital converter with building-in-self-testing for medical applications is proposed. This SAR ADC is mainly composed of sam...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Online Access: | http://ndltd.ncl.edu.tw/handle/e28773 |