The development of the performance-oriented hardware allocation scheme - The implementation based on the zedboard platform
碩士 === 中原大學 === 資訊工程研究所 === 106 === The experiment as an example of hardware acceleration based on the hardware structure of the FIR filter which is implemented in the ZedBoard embedded platform. The hardware architecture will mainly use pipeline and pipeline combination of the parallel two kinds of...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2018
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| Online Access: | http://ndltd.ncl.edu.tw/handle/7ekje4 |