The development of the performance-oriented hardware allocation scheme - The implementation based on the zedboard platform
碩士 === 中原大學 === 資訊工程研究所 === 106 === The experiment as an example of hardware acceleration based on the hardware structure of the FIR filter which is implemented in the ZedBoard embedded platform. The hardware architecture will mainly use pipeline and pipeline combination of the parallel two kinds of...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2018
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| Online Access: | http://ndltd.ncl.edu.tw/handle/7ekje4 |
| Summary: | 碩士 === 中原大學 === 資訊工程研究所 === 106 === The experiment as an example of hardware acceleration based on the hardware structure of the FIR filter which is implemented in the ZedBoard embedded platform. The hardware architecture will mainly use pipeline and pipeline combination of the parallel two kinds of hardware architecture to describe and design and match the simulation behavior of the software to obtain the same results of the fixed point.
Mainly from the Vivado development kit as the design environment will use the programmable logic side to write customized hardware programs, the processing system side to write software execution programs and through transfer standards to do the transfer for the exchange of the data. The hardware architecture will also be used from the HDMI environment developed by ADI Corporation. The ultimate goal of the experiment is to successfully compile the configuration boot file through the SD card of the device in the embedded platform. Finally, we can achieve hardware/software communicate and have the computer of the operation type in a Linux environment.
The result of the final is directly simulate the execution of the software ,the Pipeline of the hardware accelerated case to the final implementation of the hardware architecture to improve the Pipeline combined with Parallel architecture for three calculation results of the fixed point. We can be found to have the obvious difference existence by obtain the measured time.
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