Study on the Hysteresis of Poly-Si Nanowires Junctionless Thin Film Transistors
碩士 === 國立中興大學 === 光電工程研究所 === 106 === The L-typed double gated device structure is fabricated and measured. The dielectric layer of top gate is SiO2, and the one of bottom gate is Si3N4. The top gate is heavily doped with phosphorus. The bottom gate is heavily doped with phosphorus or boron. It is f...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2018
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| Online Access: | http://ndltd.ncl.edu.tw/handle/7en4gb |