Performance Optimization of Gate-All-Around MOSFETs by Inner Spacers at 5 nm Technology Node
碩士 === 國立成功大學 === 奈米積體電路工程碩士學位學程 === 106 === The evolution of semiconductor technology has been progressed since Moore’s Law proposed in 1964. Dimension scaling is always the challenge for each technology node to reduce producing cost. With the continuous scaling of devices, short-channel effects ar...
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| Format: | Others |
| Language: | en_US |
| Published: |
2018
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| Online Access: | http://ndltd.ncl.edu.tw/handle/jg54wt |