A 12bit 200MS/s Time-interleaved Hybrid-SAR ADC with Two-bit-per-cycle and Digital-slope Conversions

碩士 === 國立清華大學 === 電機工程學系所 === 106

Bibliographic Details
Main Authors: Lih, Yu-Hsin, 酈又新
Other Authors: Hsieh, Chih-Cheng
Format: Others
Language:en_US
Published: 2018
Online Access:http://ndltd.ncl.edu.tw/handle/d34dzr