Deadline-aware Memory Scheduler and Governor for Heterogeneous Processors
碩士 === 國立臺灣科技大學 === 電機工程系 === 106 === Mobile systems are usually equipped with heterogeneous processors and memories to trade off power and performance. The energy-efficient scheduling of such system is difficulty from two folders: tasks executed on such system with the end-to-end deadline and with...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2018
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| Online Access: | http://ndltd.ncl.edu.tw/handle/fxhvx7 |