Deadline-aware Memory Scheduler and Governor for Heterogeneous Processors

• Main Authors: Xue-Xin He, 何學昕
• Other Authors: Ya-Shu Chen
• Format: Others
• Language: en_US
• Published: 2018
• Online Access: http://ndltd.ncl.edu.tw/handle/fxhvx7

碩士 === 國立臺灣科技大學 === 電機工程系 === 106 === Mobile systems are usually equipped with heterogeneous processors and memories to trade off power and performance. The energy-efficient scheduling of such system is difficulty from two folders: tasks executed on such system with the end-to-end deadline and with varied power consumption from the heterogeneous component. A deadline-aware scheduler is proposed to deal with the performance degradation from memory bandwidth contention. A DVFS governor to manage processors and memory, and the run-time memory overclocking reclaiming is presented to minimize the energy consumption while maintaining the performance. Evaluation results show considerable schedulability and energy conservation using this framework.