A SUCCESSIVE APPROXIMATION RECURSIVE DIGITAL LOW-DROPOUT VOLTAGE REGULATOR WITH SPEED-UP CONTROL
碩士 === 大同大學 === 電機工程學系(所) === 106 === This thesis presents a digital low-dropout linear regulator with a 7-bit 75-MS/s SAR digital converter. The shift register in the SAR architecture skips some flip-flops according to the proposed logic, which can shorten the comparison time and achieve fast trans...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2018
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/uach28 |