Improving Wafer Retesting Performance Using Greedy Algorithm

碩士 === 國立中興大學 === 資訊科學與工程學系所 === 107 === The technological advancements on integrated circuits (IC) drive the increasing of wafer size as well as the number of dies that can be put in a wafer. As a result, the costs of testing and retesting wafers also increase. Wafer test is divided into probing an...

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Bibliographic Details
Main Authors: Kuang-Hung Cheng, 鄭光宏
Other Authors: 廖宜恩
Format: Others
Language:zh-TW
Published: 2019
Online Access:http://ndltd.ncl.edu.tw/handle/3rn6n8