High Efficient Bandwidth Utilization Hardware Design and Implement for AI Deep Learning Accelerator
碩士 === 國立中興大學 === 電機工程學系所 === 107 === This paper proposes a neural network accelerator for Tiny-Yolo V2, and converts the data formats of input, output, and weight to uint8 through a quantization strategy to reduce the data size and make the hardware utilization more efficient. Since the size of inp...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2019
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| Online Access: | http://ndltd.ncl.edu.tw/cgi-bin/gs32/gsweb.cgi/login?o=dnclcdr&s=id=%22107NCHU5441106%22.&searchmode=basic |