| Summary: | 碩士 === 國立成功大學 === 電機工程學系 === 107 === This thesis presents two hardware Trojan designs that employ time information as a trigger condition based on the understanding of the time maintenance and update mechanism
on a modern system. One is a real-time based Trojan, which will attack a system at some specific real-world time. The other is a relative-time based Trojan, which will be triggered when a specific time passes after the system is powered on. In either case, when a hardware Trojan is triggered, its payload circuit will corrupt the system or leakage internal confidential information to the attackers. In addition, this thesis also presents a hardware design scheme, which allows the trigger condition to be programmed after the chip is manufactured. The proposed time-related hardware Trojans have been inserted into an open-source processor and some of the current Trojan detection methods have been used to evaluate the effectiveness of the time-related hardware Trojans. Moreover, we implement the time-
related hardware Trojans in the FPGA boards to demonstrate the attack effect. Experimental results show that the extra delay, area and power consumption are very small. In addition, we also use commercial verification tools and Trojan feature extraction detection technology to evaluate the presented hardware Trojans. Analysis results show that the above methods are not effective or additional test assertions are needed to detect the presented Trojan designs.
|
|---|
