The design and implementation of an SoC based on the RISC-V Instruction Set Architecture
碩士 === 國立交通大學 === 資訊科學與工程研究所 === 107 === The purpose of this research is to design and implement a system-on-chip (SoC) based on the RISC-V instruction set architecture (ISA). RISC-V is an open source ISA based on the Reduced Instruction Set Computing (RISC) principle. Compared to most RISC ISAs, th...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2019
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| Online Access: | http://ndltd.ncl.edu.tw/handle/qb64q4 |