Investigation of III-V High Electron Mobility Transistors and the Approaches of the Threshold-voltage Modulation

博士 === 國立臺灣大學 === 電子工程學研究所 === 107 === This dissertation mainly focuses on the strategies of threshold-voltage (Vth) modulation to achieve E-mode operation for III-V high-electron-mobility transistors (HEMTs). First one is to form the fin-shaped channel on HEMT with the Schottky-gate which is called...

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Bibliographic Details
Main Authors: Li-Cheng Chang, 張立成
Other Authors: 吳肇欣
Format: Others
Language:en_US
Published: 2019
Online Access:http://ndltd.ncl.edu.tw/handle/4zv99g
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Summary:博士 === 國立臺灣大學 === 電子工程學研究所 === 107 === This dissertation mainly focuses on the strategies of threshold-voltage (Vth) modulation to achieve E-mode operation for III-V high-electron-mobility transistors (HEMTs). First one is to form the fin-shaped channel on HEMT with the Schottky-gate which is called “Schottky-gate Fin-HEMT”. For the InGaAs device, Vth can be adjusted to 0.56 V with fin width (Wfin) of 54 nm. The positive Vth shift can be observed with the Wfin scaling and the total movement of Vth from planar to 54-nm-Wfin device is +2.98 V. However, with the Wfin scaling, the gate leakage also becomes significant which is caused by the sidewall leakage. AlGaN/GaN Schottky-gate Fin-HEMT also exhibits the same trend of the Vth modulation with lower gate leakage due to the higher bandgap of GaN. In order to further investigate the ON/OFF switching mechanism, simulation with the 3-dimensional Poisson and drift-diffusion model is applied. For the fin device, carrier concentration in channel is modulated both vertically and laterally. On the other hand, band diagram suggests that it is pulled up more rapidly than the planar device. These results indicate that once the fin is narrow enough, channel can be pinched off earlier than the planar device which can be regarded as “early pinch-off effect”. Second approach to modulate the Vth is to utilize the fluorine-doped technique to form the F-doped MIS-HEMT. Positive Vth of 1.15 V with 5-minute F-plasma is achieved. Through the pulsed I-V and DC stress measurement, a retentive Vth shift is observed which can be recovered through a negative bias. This result indicates that the trap in the gate oxide is characterized by long emission time constant which can be regarded as border trap and is caused by the F diffusion during the annealing.