The Characteristic Analysis of DRAM MIM Capacitor and STT-MRAM LLG-based Model
碩士 === 國立臺灣大學 === 電子工程學研究所 === 107 === Since Samsung released 20nm DRAM products in 2015, DRAM has now migrated to the 1x, 1y, 1z era. The main challenge is how to maintain the sufficient capacitance in the limited area to prevent the sensing error as DRAM capacitor scaling. How to increasing the e...
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ndltd-TW-107NTU054280892019-11-16T05:28:01Z http://ndltd.ncl.edu.tw/handle/q6p6r9 The Characteristic Analysis of DRAM MIM Capacitor and STT-MRAM LLG-based Model 動態隨機存取記憶體之電容特性分析及自旋轉移力矩式磁阻式隨機存取記憶體模型模擬 I-Cheng Tung 董宜承 碩士 國立臺灣大學 電子工程學研究所 107 Since Samsung released 20nm DRAM products in 2015, DRAM has now migrated to the 1x, 1y, 1z era. The main challenge is how to maintain the sufficient capacitance in the limited area to prevent the sensing error as DRAM capacitor scaling. How to increasing the effective area of capacitor or decrease the equivalent oxide thickness (EOT) is the main solution. The problem could be solved by means of changing the structure or materials. However, high dielectric constant oxide generally has the lower energy gap. Therefore, under the condition of the low leakage current, achieve the minimum of equivalent oxide thickness (EOT) to be the next generation DRAM products. On the other hand, Spin-Transfer Torque Magnetic Radom Access Memory (STT-MRAM) has emerged as a promising candidate for the next generation of non-volatile memory. STT-MRAM switching the magnetization through Magnetic Tunneling Junction (MTJ) with polarized current to change their resistance state as data. STT-MRAM has many advantages, including non-volatility, high speed, low power dissipation, and high endurance. In the first part, investigate on ZrO2-based film as DRAM capacitor. During atomic layer deposition (ALD) process, fabricate ZrO2-Al2O3-ZrO2 (ZAZ) film and investigate on the relationship between the locations of interposed layer Al2O3 and electrical characteristics. On the other hand, analyze the ZAZ film with the various location at the different ALD process temperature, and conduct time dependent dielectric breakdown (TDDB) analysis to prevent whether the dielectric has 10-year lifetime on the normal operation or not. In the next chapter, simulate the leakage current of ZAZ film with the various location of Al2O3 the by TCAD simulation, and explain the asymmetry factor of leakage current with the various location of Al2O3 In the second part, establish the model of perpendicular Magnetic Tunneling Junction (pMTJ) on the basis of Landau-Lifshitz-Gilbert (LLG) equation. Through the drive current, the dynamic magnetization as a function of time would be switched between high resistant state (HRS) and low resistant state (LRS). The accuracy of the model had been verified with the theorems. Furthermore, according to Fokker-Planck theorem, simulate the initial angle distribution of magnetization owing to thermal fluctuation. Based on the other’s experiment, run the LLG-based model many times to predict write error rate (WER) of STT-MRAM by means of Monte Carlo method and plot Shmoo plot to determine the operation point for WER=1E-6. On the other hand, analyze the change of reliability issue plot after considering the diameter and thickness variation of MTJ owing to process variation. Chee-Wee Liu 劉致為 2019 學位論文 ; thesis 71 en_US |
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碩士 === 國立臺灣大學 === 電子工程學研究所 === 107 === Since Samsung released 20nm DRAM products in 2015, DRAM has now migrated to the 1x, 1y, 1z era. The main challenge is how to maintain the sufficient capacitance in the limited area to prevent the sensing error as DRAM capacitor scaling. How to increasing the effective area of capacitor or decrease the equivalent oxide thickness (EOT) is the main solution. The problem could be solved by means of changing the structure or materials. However, high dielectric constant oxide generally has the lower energy gap. Therefore, under the condition of the low leakage current, achieve the minimum of equivalent oxide thickness (EOT) to be the next generation DRAM products. On the other hand, Spin-Transfer Torque Magnetic Radom Access Memory (STT-MRAM) has emerged as a promising candidate for the next generation of non-volatile memory. STT-MRAM switching the magnetization through Magnetic Tunneling Junction (MTJ) with polarized current to change their resistance state as data. STT-MRAM has many advantages, including non-volatility, high speed, low power dissipation, and high endurance.
In the first part, investigate on ZrO2-based film as DRAM capacitor. During atomic layer deposition (ALD) process, fabricate ZrO2-Al2O3-ZrO2 (ZAZ) film and investigate on the relationship between the locations of interposed layer Al2O3 and electrical characteristics. On the other hand, analyze the ZAZ film with the various location at the different ALD process temperature, and conduct time dependent dielectric breakdown (TDDB) analysis to prevent whether the dielectric has 10-year lifetime on the normal operation or not. In the next chapter, simulate the leakage current of ZAZ film with the various location of Al2O3 the by TCAD simulation, and explain the asymmetry factor of leakage current with the various location of Al2O3
In the second part, establish the model of perpendicular Magnetic Tunneling Junction (pMTJ) on the basis of Landau-Lifshitz-Gilbert (LLG) equation. Through the drive current, the dynamic magnetization as a function of time would be switched between high resistant state (HRS) and low resistant state (LRS). The accuracy of the model had been verified with the theorems. Furthermore, according to Fokker-Planck theorem, simulate the initial angle distribution of magnetization owing to thermal fluctuation. Based on the other’s experiment, run the LLG-based model many times to predict write error rate (WER) of STT-MRAM by means of Monte Carlo method and plot Shmoo plot to determine the operation point for WER=1E-6. On the other hand, analyze the change of reliability issue plot after considering the diameter and thickness variation of MTJ owing to process variation.
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author2 |
Chee-Wee Liu |
author_facet |
Chee-Wee Liu I-Cheng Tung 董宜承 |
author |
I-Cheng Tung 董宜承 |
spellingShingle |
I-Cheng Tung 董宜承 The Characteristic Analysis of DRAM MIM Capacitor and STT-MRAM LLG-based Model |
author_sort |
I-Cheng Tung |
title |
The Characteristic Analysis of DRAM MIM Capacitor and STT-MRAM LLG-based Model |
title_short |
The Characteristic Analysis of DRAM MIM Capacitor and STT-MRAM LLG-based Model |
title_full |
The Characteristic Analysis of DRAM MIM Capacitor and STT-MRAM LLG-based Model |
title_fullStr |
The Characteristic Analysis of DRAM MIM Capacitor and STT-MRAM LLG-based Model |
title_full_unstemmed |
The Characteristic Analysis of DRAM MIM Capacitor and STT-MRAM LLG-based Model |
title_sort |
characteristic analysis of dram mim capacitor and stt-mram llg-based model |
publishDate |
2019 |
url |
http://ndltd.ncl.edu.tw/handle/q6p6r9 |
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