Adaptive Cache Contention-aware Scheduling and Governor for Asymmetric Multicore System
碩士 === 國立臺灣科技大學 === 電機工程系 === 107 === Asymmetric multicore architecture is widely applied to the embedded systems to better trade-off performance and energy consumption. With an increased number of applications concurrently executed in the system, the power consumption and the associated last-level...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2019
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| Online Access: | http://ndltd.ncl.edu.tw/handle/33s72s |