On the interaction between power-aware computer-aided design algorithms for field-programmable gate arrays
As Field Programmable Gate Array (FPGA) power consumption continues to increase, lower power FPGA circuitry, architectures, and Computer-Aided Design (CAD) tools need to be developed. Before designing low-power FPGA circuitry, architectures, or CAD tools, we must first determine where the biggest...
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| Format: | Others |
| Language: | English |
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2009
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| Online Access: | http://hdl.handle.net/2429/14332 |