Design and VLSI implementation of a convolutional encoder and majority logic decoder for forward error correction in intrabuilding power line communications
The need for simple and effective forward error correction (FEC) schemes for use in modern low-cost communication systems continues, especially for intrabuilding power line (IPL) communications. In particular, the use of short random error correcting convolutional codes with a moderate degree of...
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| Format: | Others |
| Language: | English |
| Published: |
2009
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| Online Access: | http://hdl.handle.net/2429/4879 |