System Interconnection Design Trade-offs in Three-Dimensional (3-D) Integrated Circuits
Continued technology scaling together with the integration of disparate technologies in a single chip means that device performance continues to outstrip interconnect and packaging capabilities, and hence there exist many difficult engineering challenges, most notably in power management, noise isol...
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Format: | Doctoral Thesis |
Language: | English |
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KTH, Elektronik- och datorsystem, ECS
2008
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Online Access: | http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-9586 http://nbn-resolving.de/urn:isbn:978-91-7415-169-5 |