Design and Implementation of an Extendable SoC Virtual Platform in SystemC-TLM 2.0
With the increasing design complexity for SoC development, the workload for hardware designer and verification engineer is becoming larger and larger. On the other hand, software and hardware development is unable to be carried out in parallel. This creates a bottleneck in the current design flow. A...
| Main Author: | |
|---|---|
| Format: | Others |
| Language: | English |
| Published: |
KTH, Elektroniksystem
2012
|
| Subjects: | |
| Online Access: | http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-98661 |