A clock driver with reduced EMI
A clock driver that works on the principle of charging and discharging the clock network in a VLSI circuit in two steps is investigated in a few different configurations. The aim of the design is twofold: to reduce the power consumption to reduce the third harmonic of the clock signal, and thereby t...
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| Format: | Others |
| Language: | English |
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Linköpings universitet, Elektroniska komponenter
2014
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| Online Access: | http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-105673 |