Design and implementation of a decimation filter using a multi-precision multiply and accumulate unit for an audio range delta sigma analog to digital converter
This work presents the design and implementation of a decimation filter for a three bits sigma delta analog to digital converter. The input is audio with a oversampling ratio of 32. Filter optimization and tradeoffs concerning the design is described. The filter is a multistage filter consisting of...
| Main Author: | |
|---|---|
| Format: | Others |
| Language: | English |
| Published: |
Linköpings universitet, Institutionen för systemteknik
2008
|
| Subjects: | |
| Online Access: | http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-11261 |