A Synthesizable VHDL Behavioral Model of A DSP On Chip Emulation Unit
This thesis describes the VHDL behavioral model design of a DSP On Chip Emulation Unit. The prototype of this design is the OnCE port of the Motorola DSP56002. Capabilities of this On Chip Emulation Unit are accessible through four pins, which allows the user to step through a program, to set the b...
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| Format: | Others |
| Language: | English |
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Linköpings universitet, Institutionen för systemteknik
2003
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| Online Access: | http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1723 |