An Integrated System-Level Design for Testability Methodology

An Integrated System-Level Design for Testability Methodology

HARDWARE TESTING is commonly used to check whether faults exist in a digital system. Much research has been devoted to the development of advanced hardware testing techniques and methods to support design for testability (DFT). However, most existing DFT methods deal only with testability issues at...

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Bibliographic Details
Main Author: Larsson, Erik
Format: Doctoral Thesis
Language:English
Published: Linköpings universitet, ESLAB - Laboratoriet för inbyggda system 2000
Subjects:
Digital systems
Test design
System-on-chip
Hardware
Systems design
Testing
Dissertations
Hårdvara
Systemutveckling
Testning
Databehandling Systemutveckling
Computer and systems science
Data- och systemvetenskap
Online Access:http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-4932
http://nbn-resolving.de/urn:isbn:91-7219-890-7

Internet

http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-4932
http://nbn-resolving.de/urn:isbn:91-7219-890-7

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