Efficient high-speed on-chip global interconnects

The continuous miniaturization of integrated circuits has opened the path towards System-on-Chip realizations. Process shrinking into the nanometer regime improves transistor performancewhile the delay of global interconnects, connecting circuit blocks separated by a long distance, significantly inc...

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Bibliographic Details
Main Author: Caputa, Peter
Format: Doctoral Thesis
Language:English
Published: Linköpings universitet, Elektroniska komponenter 2006
Subjects:
Online Access:http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-7123
http://nbn-resolving.de/urn:isbn:91-85457-87-6