FPGA Implementation of a Video Scaler
Three algorithms for video scaling were developed and tested in software, for implementation on an FPGA. Two of the algorithms were implemented in a video scaler system. These two algorithms scale up with factors 1.25 and 1.875, which is used for scaling SD WIDE to HD resolution and SD WIDE to FullH...
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| Format: | Others |
| Language: | English |
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Norges teknisk-naturvitenskapelige universitet, Institutt for elektronikk og telekommunikasjon
2010
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| Online Access: | http://urn.kb.se/resolve?urn=urn:nbn:no:ntnu:diva-10187 |